Field of the Invention
The present technique relates to a photoelectric conversion apparatus.
Description of the Related Art
In photoelectric conversion apparatuses such as complementary-metal-oxide-semiconductor (CMOS) image sensors, if electric charge generated at an interface between an element-isolation insulating member and a semiconductor region is taken into a photoelectric conversion portion, noise such as dark currents and white scratches increases, leading to a reduction in the signal-to-noise (S/N) ratio. For reduction of such noise, a semiconductor region whose conductivity type is opposite to that of the signal charge is provided around the element-isolation insulating member.
According to Japanese Patent Laid-Open No. 2015-95484, a p-type guard ring GR is provided on one side of a photodiode PD1 (a trench isolation TI). Furthermore, an epitaxial layer PE3 provided exactly below the trench isolation TI in such a manner as to fill a deep trench DT forms a pixel isolation region SPT.
In the technique disclosed by Japanese Patent Laid-Open No. 2015-95484, however, the isolation structure is not thoroughly examined, and the degree of improvement in the S/N ratio obtained in this technique is still limited.